Problem Set Answers: Computer Systems

1. The PC holds the address of the next instruction to be executed. The IR holds the instruction being executed.
2. • address
   • data
   • control
   • power
3. This is done for better performance. If there is only one bus then devices have to wait to use the bus. This slows the system down significantly, especially when the CPU is trying to fetch an instruction from memory and has to wait.
4. Interrupts provide a mechanism to signal the CPU that some event has occurred that needs to be handled.
5. • I/O
   • timer
   • memory fault
   • debugging break point reached
   • divide by zero
   • overflow/underflow
6. An interrupt handler is software. There is one handler for each type of interrupt. The handler takes care of the conditions that caused the interrupt, so that execution of the current process can resume.
7. 1. IF: instruction fetch
   2. ID: instruction decode/register fetch
   3. EX: execute/compute effective address
   4. MEM: memory access
   5. WB: write back
8. The next instruction is fetched from memory (at the address given by the PC) and stored in the IR. The PC is incremented by 4 to get the address of the next instruction (assuming there is no branch).
9. • ID: The control circuits decode the instruction in the IR to determine what operation is specified. The registers specified in the instruction are fetched from the register file and loaded into the ALU inputs.
   • EX: The operation specified by the instruction is performed by the ALU and placed on the output of the ALU.
   • MEM: Nothing is done.
   • WB: The result of the operation is copied from the ALU output to the destination register.
10. • ID: The control circuits decode the instruction in the IR to determine what operation is specified. The registers specified in the instruction are fetched from the register file and loaded into the ALU inputs. The immediate operand is sign extended.
    • EX: The new PC is calculated: the sign extended immediate operand is left shifted twice (to multiply by 4) and then added to the PC. The register(s) from the instruction are subtracted by the ALU (to see whether they are equal, or which one is larger) and then the branch logic determines whether the branch will be taken.
    • MEM: Nothing is done.
    • WB: Nothing is done.
11. • ID: The control circuits decode the instruction in the IR to determine what operation is specified. The registers specified in the instruction are fetched from the register file and loaded into the ALU inputs. The immediate operand is sign extended.
    • EX: The sign extended immediate operand is added to Rs by the ALU to calculate the effective address.
    • MEM: The effective address is sent to memory and the data at that address is read.
    • WB: The data read is written to the destination register.
12. • ID: The control circuits decode the instruction in the IR to determine what operation is specified. The registers specified in the instruction are fetched from the register file and loaded into the ALU inputs. The immediate operand is sign extended.
    • EX: The sign extended immediate operand is added to Rs by the ALU to calculate the effective address.
    • MEM: The effective address and the value of Rt are sent to memory and the value of Rt is written to memory at that address.
    • WB: Nothing is done.
13. SpeedUp = (200ns x 200)/((5+200-1)(40ns)) = 40000/8160 = 4.91
    Max SpeedUp = 5
14. SpeedUp = (100ns x 100)/((5+100-1)(20ns)) = 10000/2080 = 4.8
    Max SpeedUp = 5

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